P8751BH

Manufacturer	INTEL CORP
Part Package Code	DIP
Package Description	PLASTIC, DIP-40
Pin Count	40
Reach Compliance Code	compliant
HTS Code	8542.31.00.01
Has ADC	NO
Additional Feature	BOOLEAN PROCESSOR
Address Bus Width	16
Bit Size	8
Boundary Scan	NO
CPU Family	8051
Clock Frequency-Max	12 MHz
DAC Channels	NO
DMA Channels	NO
External Data Bus Width	8
Format	FIXED POINT
Integrated Cache	NO
JESD-30 Code	R-PDIP-T40
JESD-609 Code	e0
Length	52.26 mm
Low Power Mode	NO
Number of DMA Channels
Number of External Interrupts	2
Number of I/O Lines	32
Number of Serial I/Os	1
Number of Terminals	40
Number of Timers	2
On Chip Data RAM Width	8
On Chip Program ROM Width	8
Operating Temperature-Max	70 °C
Operating Temperature-Min
PWM Channels	NO
Package Body Material	PLASTIC/EPOXY
Package Code	DIP
Package Equivalence Code	DIP40,.6
Package Shape	RECTANGULAR
Package Style	IN-LINE
Qualification Status	Not Qualified
RAM (bytes)	128
RAM (words)	128
ROM (words)	4096
ROM Programmability	OTPROM
Seated Height-Max	5.08 mm
Speed	6 MHz
Supply Current-Max	175 mA
Supply Voltage-Max	5.5 V
Supply Voltage-Min	4.5 V
Supply Voltage-Nom	5 V
Surface Mount	NO
Technology	NMOS
Temperature Grade	COMMERCIAL
Terminal Finish	TIN LEAD
Terminal Form	THROUGH-HOLE
Terminal Pitch	2.54 mm
Terminal Position	DUAL
Width	15.24 mm
uPs/uCs/Peripheral ICs Type	MICROCONTROLLER

Product Detail

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