142427562

Products

DSPIC30F5011-30I/PT

Short Description:

• Modified Harvard architecture
• C compiler optimized instruction set architecture
• Flexible addressing modes
• 83 base instructions
• 24-bit wide instructions, 16-bit wide data path
• 66 Kbytes on-chip Flash program space


Product Detail

Product Tags

FeaturesHigh-Performance Modified RISC CPU

1.Modified Harvard architecture
2.C compiler optimized instruction set architecture
3.Flexible addressing modes
4.83 base instructions
5.24-bit wide instructions, 16-bit wide data path
6.66 Kbytes on-chip Flash program space
7.4 Kbytes of on-chip data RAM
8.1 Kbyte of nonvolatile data EEPROM
9.16 x 16-bit working register array
10.Up to 30 MIPS operation:
- DC to 40 MHz external clock input
- 4 MHz-10 MHz oscillator input with
PLL active (4x, 8x, 16x)

Up to 41 interrupt sources

- Eight user selectable priority levels
- Five external interrupt sources
- Four processor traps

DSP Features

1.Dual data fetch
2.Modulo and Bit-Reversed modes
3.Two 40-bit wide accumulators with optional
saturation logic
4.17-bit x 17-bit single cycle hardware fractional/
integer multiplier
5.All DSP instructions are single cycle
- Multiply-Accumulate (MAC) operation
6.Single cycle ±16 shift

Peripheral Features

1.High-current sink/source I/O pins: 25 mA/25 mA
2.Five 16-bit timers/counters; optionally pair up
16-bit timers into 32-bit timer modules
3.16-bit Capture input functions
4.16-bit Compare/PWM output functions
5.Data Converter Interface (DCI) supports common
audio codec protocols, including I2S and AC’97
6.3-wire SPI modules (supports four Frame modes)
7.I2C™ module supports Multi-Master/Slave mode
and 7-bit/10-bit addressing
8.Two addressable UART modules with FIFO buffers
9.Two CAN bus modules compliant with CAN 2.0B standard

Analog Features

1.12-bit Analog-to-Digital Converter (ADC) with:
- 200 ksps conversion rate
- Up to 16 input channels
- Conversion available during Sleep and Idle
2.Programmable Low-Voltage Detection (PLVD)
3.Programmable Brown-out Detection and Reset generation
Special Microcontroller Features:
4.Enhanced Flash program memory:
- 10,000 erase/write cycle (min.) for industrial temperature range, 100K (typical)
5.Data EEPROM memory:
- 100,000 erase/write cycle (min.) for industrial temperature range, 1M (typical)
6.Self-reprogrammable under software control
7.Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
8.Flexible Watchdog Timer (WDT) with on-chip low- power RC oscillator for reliable operation
9.Fail-Safe Clock Monitor operation:
- Detects clock failure and switches to on-chip low-power RC oscillator
Programmable code protection:
10.In-Circuit Serial Programming™ (ICSP™) programming capability
11.Selectable Power Management modes:
- Sleep, Idle and Alternate Clock modes
CMOS Technology:
12.Low-power, high-speed Flash technology
13.Wide operating voltage range (2.5V to 5.5V)
14.Industrial and Extended temperature ranges
15.Low power consumption


  • Previous:
  • Next: